The present invention relates to a voltage generating system for generating a plurality of voltages.
There is a known power supply circuit which uses a single integrated circuit (IC) to generate and supply a plurality of voltages to a display device or the like. The power supply circuit controls each voltage, depending on whether or not a device to which the voltage is supplied is operating (see, for example, Japanese Unexamined Patent Application Publication No. 2001-236127).
When a current output-type semiconductor circuit outputs a small current, charging and discharging of a source signal line of a liquid crystal display driver, an electro-luminescent (EL) display device or the like cannot be sufficiently performed. Therefore, there is a known circuit in which, when a current cannot be changed up to a value corresponding to a predetermined gradation during a horizontal scanning period, a voltage corresponding to a gradation level is initially supplied so as to obtain a desired current (see, for example, Japanese Unexamined Patent Application Publication No. 2005-181461).
On the other hand, as large-sized and higher-definition display devices have been developed in recent years, a plurality of ICs are used to generate a plurality of voltages so as to drive the display device. When the size of a display device is increased, a plurality of ICs need to be provided in the vicinity of the display device so as to drive the display device since the number of terminals and the size of a circuit for driving the display device are also increased. For such a power supply circuit comprising a plurality of ICs, it is necessary to eliminate differences between voltages generated by the separate ICs.
FIG. 14 is a block diagram illustrating a configuration of a conventional voltage generating system. The voltage generating system of FIG. 14 comprises voltage generating devices 91 and 92. The voltage generating devices 91 and 92 each generate N voltages (N is an integer of two or more), and outputs M (M is an integer of two or more) of the N voltages to a display device 94. The voltage generating devices 91 and 92 belong to different IC chips.
FIG. 15 is a block diagram illustrating an exemplary configuration of the voltage generating device 91 of FIG. 14. The voltage generating device 91 comprises a maximum and minimum voltage generating section 96, an intermediate voltage generating section 97, and a voltage selecting section 98. The maximum and minimum voltage generating section 96 generates and outputs a maximum voltage VMAX and a minimum voltage VMIN to the intermediate voltage generating section 97.
Based on the maximum voltage VMAX and the minimum voltage VMIN, the intermediate voltage generating section 97 generates and outputs voltages V[1], V[2], . . . , V[N] (hereinafter collectively referred to as voltages V[1:N]) to the voltage selecting section 98. In the intermediate voltage generating section 97, for example, the maximum voltage VMAX and the minimum voltage VMIN are input to a circuit in which a plurality of resistors are connected in series, and a voltage of a connection point between each resistor is impedance-converted and output by an operational amplifier. The voltage selecting section 98 selects and outputs M of the voltages V[1:N] to the display device 94. The voltage generating device 92 has the same configuration.
However, characteristics of a device included in an IC vary from IC to IC, and therefore, characteristics of the resistors and the operational amplifier of the intermediate voltage generating section 97 vary between the voltage generating devices 91 and 92. Also, the maximum voltage VMAX and the minimum voltage VMIN may also vary between the voltage generating devices 91 and 92. Therefore, the voltages V[1:N] output from the voltage generating device 91 may not be equal to the voltages V[1:N] output from the voltage generating device 92.
In the case of display devices, an error in the supplied voltages V[1:N] is desired to be, for example, 10% or less. However, according to the configuration of FIG. 14, this criterion may not be satisfied due to a variation in semiconductor process.